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I have a makefile with a recursive call to itself. When I first run make, the object files are created and linked just fine. But when I modify a source file and run make again, the objects are not recreated (make says the target is up to date). I need to run make clean and then run make. Here is simplified version of my makefile which I think includes all relevant information:

PCC = mpicc

#Locations
OBJDIR = ./objects

#Compiler and linker flags
FLAGS = -g -lm

#Object files
SHAREDOBJS = $(addprefix $(OBJDIR)/,shared1.o shared2.o)
SPECIFICOBJS = $(addprefix $(OBJDIR)/,specific1.o specific2.o)

#How to compile and link
$(OBJDIR)/%.o: %.c
    $(PCC) -c $*.c $(EXTRA_FLAGS) -o $(OBJDIR)/$*.o

PROGNAME:
    $(MAKE) $(MAKEFLAGS) EXTRA_FLAGS="$(FLAGS)" PROGNAME_TARGET

PROGNAME_TARGET: $(SHAREDOBJS) $(SPECIFICOBJS)
    $(PCC) $(SHAREDOBJS) $(SPECIFICOBJS) $(EXTRA_FLAGS) -o PROGNAME

So running make PROGNAME the first time compiles just fine. But the second returns make: "PROGNAME" is up to date.

It appears to me that the recursive call is never made. For example, if I add an echo right before the call to make, nothing is displayed in stdout.

Why is this happening? Why are the timestamps on the source files not checked in the recursive call? I don't understand why the recursion breaks the dependency on the source files.

Thanks in advance.

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1 Answer

The target PROGNAME has no prerequisites.

The first time you make PROGNAME, Make sees that there is no such file, so it executes the rule.

The second time (after you modify shared1.o), Make sees that PROGNAME already exists, and that the target has no prerequisites, so it sees no need to rebuild the target. It doesn't know that PROGNAME depends on shared1.o, because you didn't tell it.

There's more than one way to solve this problem. I suggest you do away with the recursion entirely and use a target-specific variable value:

PROGNAME: EXTRA_FLAGS="$(FLAGS)"
PROGNAME: PROGNAME_TARGET

(Your target names could be improved, but that can wait.)


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