building makefile project with multiple .c files

Question

I have the following project structure (using eclipse)

project/
 |____ inc/
 |       |___ config_prog.h
 |       |___ prog_lib.h
 |
 |____ data/
 |       |___ img.bmp
 |
 |__ prog_lib.c
 |__ main.c
 |__ makefile

And i made the following makefile :

CC=gcc
CFLAGS= -O0 -c -Wall -mavx2 -mfma
LDFLAGS=

SOURCES=$ main.c inc/prog_lib.c
OBJECTS=$(SOURCES:.c=.o)

EXECUTABLE=main

all: $(TASKMAP) $(SOURCES) $(EXECUTABLE)

$(EXECUTABLE): $(OBJECTS) 
    $(CC) $(LDFLAGS) $(OBJECTS) -o $@ -lm

.c.o:
    $(CC) $(CFLAGS) $< -lm -o $@

clean: 
    rm -fr $(OBJECTS) $(EXECUTABLE)

but when i try to build the project i get the following error:make: *** No rule to make target 'inc/prog_lib.c', needed by 'all'. Stop.

Could someone tell me the problem?

Answer 1

Read more about GNU make and take time to read its documentation.

Your variable assignment

 SOURCES=$ main.c inc/prog_lib.c

is wrong. It should be

 SOURCES= main.c prog_lib.c

You probably need also (better ask for -g to facilitate debugging with gdb)

CFLAGS= -O0 -c -Wall -g -mavx2 -mfma -Iinc

Try also make -p to understand the builtin rules. You should use them better (and then using -c in your CFLAGS is probably wrong).

Consider using remake, perhaps as remake -x, to debug your Makefile; or at least make --trace.

BTW, I believe that your file hierarchy is too complex and inappropriate. For such a simple and small project, having an inc/ directory is not worth the pain.

For inspiration, study the Makefile of some existing free software, e.g. on github.